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Senior Electrical Validation Engineer

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Seize the opportunity to work with the team responsible for power validation, analysis and optimization for PCs millions of people around the world will use. The Chipsets Power Team is part of the Chipsets Silicon Group (CSG) within Silicon Engineering Group (SEG) and are responsible for modelling key power performance indicators (KPIs) for client and server chipsets.

As a PCH Power Validation Engineer, a typical day may include, but is not limited to:
  • Developing pre-silicon validation tests (Simulation and/or Emulation) for power validation
  • Performing workload power analysis and characterization
  • Developing flows to enable efficient and accurate power analysis
  • Collaborating with cross-functional teams to:
  • Provide power targets to design teams
  • Define power rollup and convergence methodology
  • Identify opportunities for power optimization in existing design
  • Identify new power saving features, define power optimization solutions
  • Drive these optimizations into current and next-generation Client and Server Chipsets
You are:
  • Passionate about design/tools and quality
  • Up for design/validation challenges
  • Organized
  • A strong technical leader who communicates well with great influencing skills
  • Someone who meets their commitments
  • Motivated
  • Self-driven
  • Someone who wants to make a difference through technology
We are:
  • Open to new ideas and methodologies
  • A collaborative team demonstrating the best teamwork across Intel
  • Here to help you succeed
  • People who want to do innovative things
If your skillsets align with our needs, we will provide you a great path to maximize your positive impact on the world.


Bachelor's Degree in Electronics Engineering, Computer Science, or equivalent.

Minimum Qualifications:
  • 2+ years of experience in pre-silicon validation with SystemVerilog OVM/UVM, or Emulation (ZSE/Veloce).
  • 2+ years of experience in digital design or post silicon power measurements and correlation.
  • 2+ years of experience in dynamic and leakage power estimation and reduction at architecture/RTL/block synthesis and circuit design level.
  • Strong chipset/CPU level understanding required on power consumption, power estimation and low power design methods.
  • Broad understanding of the overall chipset/CPU architecture.
  • Programming skills in Python, PERL and/or TCL and/or Shell* is required.
  • Proficiency with use of Spreadsheets tools is required.
  • Strong problem solving and analytical skills.
  • Excellent cross-functional communication and/or interaction skills.
Inside this Business Group

The Silicon Engineering Group is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs that power Intel's leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.

Other Locations

Malaysia, Kulim

MYExperienced HireJR0129239Penang
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